1. Field of the Invention
The present invention relates to a semiconductor memory device such as the DRAM (dynamic random access memory) and, more particularly, it relates to a memory device of the trench-capacitor type.
2. Description of the Related Art
FIG. 1 shows an example of the conventional DRAM cells and this DRAM cell was made public at IEDM in 1987 and it was also disclosed in a paper titled "A 4.2 .mu.m.sup.2 Half-Vcc Sheath-Plate Capacitor DRAM Cell with Self-Aligned Buried Plate-Wiring".
A MOS transistor Q1 which serves as a selection transistor comprises a gate or word line 11, and diffusion layers 12, 13. A bit line 14 is connected to the diffusion layer 13 and a storage electrode 15 which forms a capacitor C1 is connected to the diffusion layer 12. The capacitor C1 comprises the storage electrode 15, an insulating film 16 enclosing the storage electrode 15, and a capacitor electrode 17 enclosing the insulating film 16. An insulating film 18 is arranged round the capacitor electrode 17. These insulating film 18 and capacitor C1 are arranged in a trench 19 formed in a silicon substrate (not shown). The capacitor electrode 17 is connected to an impurities layer 20 embedded in the silicon substrate.
When data is to be memorized in the capacitor C1 in the case of the above-described arrangement, potential supplied to the bit line 14 is transmitted to the diffusion layer 13. When the word line 11 is selected under this state, the potential transmitted to the diffusion layer 13 is further transmitted to the storage electrode 15 via the diffusion layer 12 and stored in the capacitor C1. On the other hand, the data stored in the capacitor C1 is transmitted to the bit line 14 via the diffusion layers 12 and 13 when the word line 11 is selected.
In the case of the above-described device, the insulating film 18 is formed on the inner face of the trench 19, and the capacitor electrode 17, insulating film 16 and storage electrode 15 are formed in this order on the inner face of the insulating film 18. When the insulating film 18 is formed 0.05 .mu.m thick, the capacitor electrode 17 formed 0.1 .mu.m thick, and the insulating film 16 is made negligible because it is quite thin in a case where the diameter of the trench 19 is 0.4 .mu.m, therefore, the diameter of the storage electrode 15 becomes as follows: EQU 0.4-(0.05+0.1).times.2=0.1 .mu.m
As the result, the surface area of the capacitor section becomes so small as not to sufficiently store charges therein.